Tensilica’s New GUI Helps Cut Chip Energy Consumption

Xenergy Lets Designers Easily Evaluate Processor and Software Energy Trade-offs in Seconds

Tensilica,® Inc. today announced that it has added a new graphical user interface (GUI) to its popular Xenergy™ estimator, a unique energy estimator for both Xtensa® configurable processors and Diamond Standard processors. This “first of its kind” tool allows software developers to evaluate trade-offs, so their software can be optimized for power, and lets hardware designers optimize the design of Xtensa configurable processors for total energy consumption.

“Today, total energy consumption is a primary design consideration for both hardware designers and software developers in most market segments,” stated Steve Roddy, Tensilica’s vice president of marketing and business development. “Often, it isn’t intuitive which design decisions will have the biggest impact on overall energy consumption for a new SOC design. By using Xenergy, designers can quickly evaluate the trade-offs and know that they’ve picked the most energy efficient way to design new products.”

Xenergy for Optimized Processor Hardware Configuration

Configurable processor technology has long been known for its potential to accelerate performance. But tailoring a processor to a given task can also be used with energy minimization as a key consideration. Using Xenergy, hardware designers can drive Xtensa processor configuration choices to dramatically lower the total clock processor cycles required to perform a given functional workload, thereby reducing total energy consumed. Designers pick from a menu of different configuration options and add custom processor extensions to try to reduce total core power consumption.

The Xenergy energy estimator calculates total energy consumption for a specific software workload on a candidate processor configuration. Comparisons between candidate processors are graphically displayed. Output can be a simple text file or a colorful graph for easy evaluation. Photos are available in the News section of www.tensilica.com.

Tests of processor configurations for common embedded processing kernels such as dot product, the Advanced Encryption Standard (AES) encryption, Viterbi decoding, and Fast Fourier Transform (FFT) show that the energy improvements from processor customization can range from 2x to 83x (all comparisons using common process, design flow and libraries).