Apache Design Solutions to Host Methodology Presentations by Designers from Leading Semiconductor Companies

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June 5th, 2008 Leave a comment Visited 29 times, 1 so far today


Design Automation Conference 2008

Apache Design Solutions will host methodology presentations by designers from Broadcom, IBM, STMicroelectronics, Texas Instruments, Toshiba, and TSMC at this years’ 45th Design Automation Conference (DAC) in Anaheim, California. The designers will share their best practices on critical design challenges such as SoC power and noise sign-off, custom IP validation, and chip-package co-design. For presentation details and registration, go to http://www.apache-da.com/apache-da/Home/NewsandEvents/Seminars.html#Cu stomer. (Due to its length, this URL may need to be copied/pasted into your Internet browser’s address field. Remove the extra space if one exists.)
WHAT:
Methodology presentations by designers from Broadcom, IBM, STMicroelectronics, Texas Instruments, Toshiba, and TSMC

WHERE: Apache Design Solutions, Booth #2311

Design Automation Conference, Anaheim Convention Center, Anaheim, CA

WHEN: – Broadcom: Reducing jitter in DDR interface
June 10, 2:00 pm
June 11, 10:00 am
– IBM: Power integrity and low power design analysis
June 9, 12:00 am
– STMicroelectronics: Embedded memory validation
June 10, 11:00 am
– Texas Instruments: EMI noise modeling and compliance
June 9, 11:00 am
– Toshiba: Chip-package-system co-design for cost reduction
June 11, 1:00 pm
– TSMC: Power integrity and signoff methodology
June 9, 2:00 am

The company will also be demonstrating their complete line of power, noise, and reliability platform solutions for SoC and package/PCB designs. Demonstrations and presentations will include:
SoC dynamic power analysis from early design to signoff
Low power verification including MTCMOS, VTCMOS, and LDO
Methodology for early stage analysis from prototype to design
Analog, mixed-signal power integrity
Chip-Package-System co-design
Package and PCB power and signal integrity
Hands-on-Tutorial on chip-package co-design methodology

For more information and registration, go to http://www.apache-da.com/apache-da/Home/NewsandEvents/Seminars.html#Pr oduct (Due to its length, this URL may need to be copied/pasted into your Internet browser’s address field. Remove the extra space if one exists.)

About Apache Design Solutions

Apache delivers the leading power signoff solution adopted by 80% of the top IDM, fabless semiconductor, and foundries and a complete platform for silicon integrity of low-power, high-performance system-on-a-chip (SoC) designs. Apache’s innovative platform considers multiple noise sources that impact the design–such as power, signal, package / system IO, substrate, and temperature—and enables designers to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon and/or system. Apache’s vendor-neutral solution supports any industry-standard physical design flow and is certified by TSMC and Common Platform Reference Flows. Apache is a global company with R&D centers and direct sales / support offices worldwide. For more information, visit www.apache-da.com.

Apache Design Solutions, NSPICE, RedHawk, PakSi-E, PakSi-TM, PsiWinder, Sahara, Sentinel, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.

Contacts

Apache Design Solutions
Yukari Ohno, 408-457-2000, yukari {at} apache-da(.)com
or
Public Relations for Apache
Cayenne Communication
Michelle Clancy, 252-940-0981
michelle.clancy {at} cayennecom(.)com





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